Paper Type	::	Research Paper
Title	::	Sui Generis Plant Variety Protection: Indian Perspective
Country	::	India
Authors	::	R M Kamble
Page No.	::	01-04
	::	10.9790/3021-03520104
		0.4/3021-03520104
		3021-0305-0204

Human beings are the most intelligent among the creatures of the Earth. That is what they believe. However, they are only part of the system, and not the centre. Every creature has its own value and position in the system. Human activities often forget this fact. The Plant Patent was a tremendous step forward in the development of new cultivars for the benefit of the public. The "Peace‟ rose, was the single breakthrough that had maximum impact. Prom the Plant Patent Act, other forms of breeders‟ rights was spawned worldwide, including our own Plant Variety Protection Act (PVPA). Proof of the success has been the increasing use and acceptance of plant patents and the lack of challenges to the act and plant patent litigation. The paper deals with origin and development PBRS, the objectives of the act, its authorities and the farmer‟s rights and penalties relating to that. The paper focuses on the future farmer‟s rights and how the interest of the public can be maintained.

 

Keywords: Plant variety, PVPA, PBRS, Farmers rights, TRIPS, UPOV, EDV's.

[1]. Dr. Chidananda Reddy S. Patil, "Plant Breeders Rights", Kare Law Journal, November 2005.p.53
[2]. N. S. Gopalakrishnan,"Protection of Farmers Rights in India: Need forLegislative Changes", Vol. 25, CULR, 2001. P.107
[3]. Gopalakrishna Gandhi, "IPR and India- A View Point", Vol.10, Journal of Intellectual Property Rights, September 2005.p.360
[4]. Dr.Harpal Kaur Khera, " Registration of Plant Varieties in India: Life and Effect of Protection", AIR,2004. p.,283
[5]. Plant variety means a plant grouping within a single botanical taxon of the lowest rank, i.e., a genotype with certain fundamental characteristics and distinguishable from any other genotype in at least one fundamental characteristic and considered as a unit by consistent propagation.

Paper Type	::	Research Paper
Title	::	Recycling of Pattern Wax In The Investment Casting Process Using Microwave Dewaxing
Country	::	India
Authors	::	Doli Rani ||, D.B. Karunakar
Page No.	::	05-10
	::	10.9790/3021-03520510
		0.4/3021-03520510
		3021-0305-0210

For dewaxing in the investment casting process the use of microwave is steadily growing in industrial processes. The present work studies the possible influence of dewaxing on the wax properties in investment casting process using microwave oven. The wax blend made up of paraffin wax, microcrystalline wax, carnauba wax used in this work was prepared by melting in an oven equipped with a mineral oil bath. The chemical and structural stability of the wax were monitored throughout 10 dewaxing cycles, via various analyses, namely, linear shrinkage, volumetric shrinkage, hardness and roughness. The results showed that microwave dewaxing is viable, significantly decreasing the incorporation of dirt and water. The percentage of linear shrinkage and volumetric shrinkage is increasing gradually in each repeated cycle. The gradual change in linear shrinkage is less as compared to gradual change in volumetric shrinkage. The change in hardness is not following any pattern as it some times decreasing and some time increasing.

 

Key Words: Investment casting, wax blend, microwave oven, dewaxing, pattern properties.

[1]. S. Tascyoglu, B. Inem, and N. Akar, "Conversion of an investment casting sprue wax to a pattern wax by the modification of its properties", Materials and Design, vol. 25, 2004, pp 499 – 505.
[2]. A.S. Sabau and S. Viswanathan, "Material properties for predicting wax pattern dimensions in investment casting", Material Science and Engineering A, vol. 362, 2003, pp 125–134.
[3]. V.F. Okhuysen, K. Padmanabhan, and R.C. Voigt, "Tooling allowance practices in investment casting industry", Proceedings of the 46th Annual Technical Meeting of the Investment Casting Institute, Orlando, USA, 1998, Paper no. 1.
[4]. J.C. Gebelin and M.R. Jolly, "Modeling of the investment casting process", Journal of Material Processing Technology, vol. 135, 2003, pp 291 – 300.
[5]. W. Bonilla, S. H. Masood and P. Iovenitti, "An investigation of wax patterns for accuracy improvement in investment casting parts", Bulletin of Industrial Research Institute of Swineburne, Melbourne, Australia, vol. 18, 2001, pp 348 – 356.

Paper Type	::	Research Paper
Title	::	Structure and Optical Properties of the CdS/Cd2x(CuIn)1-xS2Heterojunction Prepared by Chemical Spray Pyrolysis
Country	::	Iraq
Authors	::	Mohammed Z. AL-Rawi ||, Hamid S. AL-Jumaili
Page No.	::	11-15
	::	10.9790/3021-03521115
		0.4/3021-03521115
		3021-0305-0215

The structural and optical properties of the CdS, Cd2x(CuIn)1-xS2 (CCIS) thin films, at x=0.2,heterojunction were studied in the present paper. The heterojunction films deposited successfully on glass slides using by the spray pyrolysis technique at 623K. The thin films CdS, CCIS and the heterojunction ITO/CdS/CCIS were characterized by using x-ray diffraction. This is to find the polycrystalline series of the CdS, and CCIS solid solution with many phases as a mixture of chalcopyrite and zinc blend. The CdS, and CCIS thin films have a grain size 35 nm, and 16 nm respectively. The surface morphology was characterized by using atomic force microscopy (AFM) technique. The optical properties of the prepared thin films were investigated by using a UV-VIS spectrophotometer in the wavelength of 300 nm to 1100 nm. The films, ITO, CdS, and CCIS show direct transition with optical energy gap (Eg) values 3.52, 2.42, and 1.7eV respectively. The optical transmission (T),absorption (A) andrefractive index (n) were also discussed .

 

Keywords: The ITO/CdS/Cd2x(CuIn)1-xS2Structure, Optical, heterojunction and thin films..

[1]. A. Bollero, J.F. Trigo, J. Herrero, M.T. Gutierrez " Simplified modulated evaporation process for the production of CuInS2 films with reduced substrate temperatures" Thin Solid Films 517 (2009) 2167- 2170.
[2]. N. HamounAllouche, N. Jebbari, C. Guasch, N. KamounTurki،، Influence of aluminum doping in CuInS2 prepared by spray pyrolysis on different Substrates ،، Journal of Alloys and compounds 501, 85-88 (2010).
[3]. T. Nakada, M. Mizutani, Y. Hagiwara and A. Kunioka Sol. Energy Mater. Sol. Cells 67 (2001) 255.
[4]. G. Gordillo and C. Calderon Sol. Energy Mater. Sol. Cells 77 (2003) 163.
[5]. S. Spiering, D. Hariskos, M. Powalla, N. Naghavi and D. Loncot Thin Solid Films 431- 432 (2003) 359.

Paper Type	::	Research Paper
Title	::	Comparative Analysis of Array Multiplier Using Different Logic Styles
Country	::	India
Authors	::	M.B. Damle ||, Dr. S.S Limaye ||, M.G. Sonwani
Page No.	::	16-22
	::	10.9790/3021-03521622
		0.4/3021-03521622
		3021-0305-0222

Multiplier is one of the most important arithmetic unit in Microprocessors and DSPs and also a major source of power dissipation. Reducing the power dissipation of multipliers is a key to satisfy the overall power budget of various digital circuits and systems. this paper elaborates the array multiplier through different logic styles. The fundamental units to design a multiplier are adders. The various types of adders used in this paper are complementary MOS (CMOS) logic style, complementary pass- transistor (CPL) logic style, double-pass transistor (DPL) logic style and domino logic style. The main objective of our work is to calculate the average power, delay and PDP of 4x4 multipliers. The design of full adder for low power is obtained and the low power units are implemented on the array multiplier and the results are analyzed for better performance. The designs are done using TANNER S-EDIT tool and are simulated using T-SPICE. The multiplier architectures are designed using the three better above said full adders and the results are compared so that we can obtain a better multiplier design.

 

Keywords: Array Multipliers, Full adder, CMOS, CPL, DPL, Domino Logic power delay product.

[1]. Chandrakasan, R. Brodersen, "Low Power Design", Kluwer Academic Publishers, 1995.
[2]. Z. Turker,, S. P.Khatri , "A DCVSL Delay Cell for Fast Low Power Frequency Synthesis Applications", IEEE transactions on circuits and systems June 2011, vol. 58, no. 6, pp. 1125-1138.
[3]. T. Sharma, Prof. B.P.Singh, K.G.Sharma, N. Arora , "High Speed Array Multipliers Based on 1-Bit Full Adders", in Int. J. of Recent Trends in Engineering and Technology, Vol. 4, No. 4, pp.26-28, Nov 2010.
[4]. Gupta, Neha Arora, Prof.B.P.Singh, "Simulation and Analysis of 2:1 Multiplexer Circuits at 90nm Technology" in International Journal of Modern Engineering Research, Vol.1, Issue.2, pp-642-647, ISSN: 2249-6645, 2011.
[5]. Ila Gupta, Neha Arora, Prof.B.P.Singh, "Low Power 2:1 Multiplexer Design Using DCVS Logic and Its Application in 1-Bit Full Adder Cell" in International Conference on Electronics and Communication Engineering (ICECE), March 03, 2012, Bhopal, India.

Paper Type	::	Research Paper
Title	::	Defective Reduction on Dent Defects in Flexible Printed Circuits Manufacturing Process
Country	::	Thailand
Authors	::	Patcharee Artharn ||, Napassavong Rojanarowan
Page No.	::	23-28
	::	10.9790/3021-03522328
		0.4/3021-03522328
		3021-0305-0228

This research presents methods to reduce defectives due to dent defects in flexible printed circuits manufacturing process. The DMAIC phases of Six Sigma quality improvement approach were applied to solve the problem. It was found that the variables that statistically affect the dent problem were 1) method to polish stainless steel plate, 2) method to store stainless steel plate, 3) method to clean stainless steel plate, 4) fisheyes/ foreign matters in the TPX release film. The dent defects were reduced by 1) changing from dry polishing method to wet polishing method, 2) storing stainless steel plates on storing tables and covering them by dust protectors, 3) improving cleaning equipment, 4) determining the relationship between the diameter of fisheyes/foreign matters in the release film and the defective proportion to encourage quality improvement of the vender. After the improvement, the defective proportion due to dent defects was reduced from 947 DPPM to 442 DPPM or 53.3% reduction. This improvement decreased defective cost of 666,529 baht per year .

 

Keywords - Six Sigma, Curing Process, Defective Reduction, Dent Defects, Printed Circuits

[1]. R. Does, E.V.D. Heuvel, J.D. Mast and S. Bisgaard, Comparing Nonmanufacturing with Traditional Application of Six Sigma, Quality Engineering, 15(1), 2002, 177-182.
[2]. S. Kumar, and M. Sosnoski, Reflective practice using DMAIC Six Sigma to systematically improve shop floor production quality and costs, International Journal of Productivity and Performance Management, 58(3), 2009, 254-273.
[3]. R.L. Shrivastava, K.I. Ahmad and T.N. Desai, Engine Assembly Process Quality Improvement using Six Sigma, Proceedingsof the World Congress on Engineering, 3, 2008.
[4]. W.C. Lo, K.M. Tsai and C.Y. Hsieh, Six Sigma approach to improve surface precision of optical lenses in the injection-molding process, The International Journal of Advanced Manufacturing Technology ,41, 2009, 885–896
[5]. S.S. Chakravorty., Six Sigma programs: An implementation model, The International Journal Production Economics, 119, 2009, 1-16

Paper Type	::	Review Paper
Title	::	3d Ear Shape Biometric Recognition by Using Ica Alorithm
Country	::	India
Authors	::	Isha Das ||, Srinivasa Raja G
Page No.	::	29-33
	::	10.9790/3021-03522933
		0.4/3021-03522933
		3021-0305-0233

Biometrics are physical or behavioral characteristics that can be used for human identification. In this dissertation, we propose the ear as a biometric and investigate its potential with both 2D and 3D data.This work is the largest experimental investigation of ear biometrics to date. The data set used for this experiments contains 50 persons, each with images acquired on at least two different dates. Approaches considered include a ICP (―eigen-ear‖) approach with 2D intensity images and range images, a Hausdorff matching of edges from range images, and an ICA-based approach to matching the 3D data. This experimental results demonstrate that the ICA-based approach outperforms the other approaches at a statistically significant level. Furthermore, this will develop the first fully automated biometric system using 3D ear shape. It is a complete automatic system starting with a raw 3D image, through automated segmentation of the ear, and 3D shape matching for recognition. The automatic system achieves a rank-one recognition rate of 97.6% on a 50-subject dataset. This algorithm shows good scalability of recognition rate with size of dataset. The results suggest a strong potential for 3D ear shape as a biometric. However, some people have ears with recognizably different shapes. Experimental results with partial ear shape suggest that minor hair covering does not affect the performance substantially, but large hair covering will certainly reduce the recognition rate. This suggests that even in circumstances where the complete ear shape cannot be captured, partial shape has potential for recognition. This lends support for using ear shape as a biometric.

 

Index Terms: Iterative Closet Point (ICP), Independent Component Analysis (ICA)

[1]. H. Chen and B. Bhanu, ―Contour matching for 3-D ear recognition,‖ in Proc. IEEE Workshop Applications Computer Vision, Jan. 2005, pp. 123–128.

[2]. H. Chen and B. Bhanu, ―Human ear recognition in 3D,‖ IEEE Trans. Pattern Anal. Machine Intell., vol. 29, no. 4, pp. 718–737, Apr. 2007.
[3]. H. Chen and B. Bhanu, ―Human ear recognition from side face range images,‖ in Proc. Int. Conf. Pattern Recognition, Aug. 2004, pp. 574–577.
[4]. S. Islam, R. Davies, M. Bennamoun, and A. Mian, ―Efficient detection and recognition of 3D ears,‖ Int. J. Computer Vision, vol. 95, no. 1, pp. 52–73, 2011.
[5]. I.Kakadiaris, G.Passalis, G. Toderici,N.Murtuza,Y.Lu,K. N. , and T. Theoharis, ―3D face recognition in the presence of facial expressions: An annotated deformable model approach,‖ IEEE Trans. Pattern Anal. Machine Intell., vol. 29, no. 4, pp. 640–649, Apr. 2007.

Paper Type	::	Research Paper
Title	::	Detection of Vulnerabilities in Network-Connected Servers
Country	::	India
Authors	::	Mrs. S. Saritha ||, Mr. M.Raja Sekhar ||, Mr. Dharamvir
Page No.	::	34-39
	::	10.9790/3021-03523439
		0.4/3021-03523439
		3021-0305-0239

Today, computer networks and distributed software systems are pervasive. Thus, the idea of secure computing is paramount. Secure Computing means avoiding improper disclosure of private or sensitive information. Data stored on a computer or processed by software should be modified only through legitimate, verifiable channels. We should guard against outsiders performing denial-of-service (DoS) attacks. For computing to be trustworthy, each bit of data the system uses and each user that interacts with the system must be authentic and legitimate. Systems must keep records of their activities to permit later forensic analysis to trace security breaches or to aid in transaction disputes. This paper considers some of the facts why business need information security policies, procedures, technical measures used to prevent unauthorized access, alteration, theft or physical damages. The major threats to business come from insiders who usually have some system knowledge and trust level. Secondly, most protection schemes target outsiders because attackers might control resource assets. For example controlling broadband Internet machines, target files containing trade secrets, credit-card numbers. Various issues for information protection system, application vulnerabilities, Security analysis, social engineering and phishing have been discussed for the benefit of IT business

 

Keywords: DoS (Denial of Service), Vulnerability, Spoofing, Firewall, IDS, Hacking, Phishing

[1]. CEH official Certified Ethical Hacker Review Guide – Kimberly Graves, Wiley India Pvt. Ltd.
[2]. Network Security Fundamentals – Peter Norton and Mike Stockman, Techmedia
[3]. Security in Computing, 3rd Edition, Charles P. Pfleeger, Shar's Lawrence pfleeger, Pearson Education
[4]. Cryptography & Network Security Principles & Practices, 3rd William Stallings, Prentice Hall of India Pvt. Ltd.
[5]. Technical Resource and Course Web Site for Cryptography and Network Security, Third Edition, by William Stallings

Paper Type	::	Research Paper
Title	::	Enterprise Data Backup & Recovery: A Generic Approach
Country	::	India
Authors	::	Majid Zaman || , Muheet Ahmed Butt
Page No.	::	40-42
	::	10.9790/3021-03524042
		0.4/3021-03524042
		3021-0305-0242

Even with the onset of 21st century there is no single backup and recovery tool available which can be used irrespective of type of Database Management System and the platform on which it is functioning. Enterprises are now days using n (multiple) heterogeneous data sources of varying Database Management Systems located at geographically distant locations interconnected by internet (intranet) and as such have to manage n backups which in turn requires n backup and recovery systems. While ORACLE dominates the market in large enterprises, yet its backup and recovery tool cannot be used for the backup and recovery of data stored on MYSQL Database Management System and/or MSSQL Database Management System. Enterprises have to pay hefty sum on backup and recovery based on the number of licenses the enterprise has acquired. In this paper we propose a backup and recovery solution which makes use of the existing database architectures and takes data backup in a manner irrespective of any specific Database Management System which can be used to recover any Database System.

[1]. M Zaman, MA Butt, DSMK Quadri, "User Desired Information Translation"Journal of Global Research in Computer Science 3 (6), 51-53
[2]. EMA Butt, SMK Quadri, EM Zaman, "Star Schema Implementation for Automation of Examination Records", WORLDCOMP, 2012 FEC3568, Las Vegas USA.
[3]. MA Butt, SMK Quadri, M Zaman," Data Warehouse Implementation of Examination Databases", International Journal of Computer Applications 44 (5), 18-23.
[4]. Buhalis, D & Laws, E. (eds) (2001). Tourism Distribution Channels-Practices, Issues and Transformations, Continuum Publishing, London.
[5]. Buhalis, D. (2003). e tourism –Information Technology for strategic tourism management, Prentice Hall, Harlow, UK

Paper Type	::	Research Paper
Title	::	Enhancement of Micro Turbine-Generator Output Voltage Quality through Application of Matrix Converter Interface
Country	::	India
Authors	::	P.Raja Sekhar || L.Suresh
Page No.	::	43-49
	::	10.9790/3021-03524349
		0.4/3021-03524349
		3021-0305-0249

Micro turbine-generator is suitable for different distributed generation applications. Due to its high speed, it is necessary to use a frequency converter to deliver the power at 50/60Hz. In this paper, application of Matrix Converter as micro turbine-generator interface converter is addressed. In this way, the interface converter becomes more compact due to omission of dc link capacitor (common in rectifier-inverter interface structure). Also, it is shown by the simulation results that by using matrix converter, quality of the output voltage is enhanced.

 

Keywords: Micro turbine-Generator (MTG), Matrix Converter (MC), Harmonics

[1]. E. F. Pavinatto, M. B. Peres, P. D. Reis, L. S. Pereira, and F. P. Salles, "Use of micro turbines in remote isolated oil and gas
facilities in Brazil", IEEE Ind. Appl. Mag., pp. 62-68, Nov./Dec. 2008.
[2]. A. K. Saha, S. Chowdhury, S. P. Chowdhury, and P. A. Crossley, "Modeling and performance analysis of a Micro turbine as a
distributed energy resource", IEEE Trans. Energy Conv., vol. 24, no. 2, pp. 529-538, Jun. 2009.
[3]. T. Yu, J. Tong, and K. W. Chan, "Study on micro turbine as a back-up power supply for power grid black-start", IEEE Int. Conf.
2009.
[4]. R. Noroozian, M. Abedi, G. B. Gharehpetian, and S. H. Hosseini, "Modelling and simulation of micro turbine generation system for
on-grid and off-grid operation modes", Int.l Conf. on Renewable Energies and Power Quality (ICREPQ'09), Apr. 2009.
[5]. P. W. Wheeler, J. Rodriguez, J. C. Clare, L. Empringham, and A. Weinstein, "Matrix Converters: A Technology Review", IEEE
Trans. Ind. Elec., vol. 49, no. 2, pp. 276-288, Apr. 2002.

Paper Type	::	Research Paper
Title	::	ZETA Converter for Boost up operation in low frequency instrumentation used in power grid application
Country	::	India
Authors	::	Mr. D.Praveen Sangeeth Kumar || , Mr. S. Prem Kumar
Page No.	::	50-58
	::	10.9790/3021-03525058
		0.4/3021-03525058
		3021-0305-0258

This system where the step-up converter is implemented by an isolated Zeta converter. In this case, the ZETA converter has two functions: To provide electrical isolation and synthesize a rectified sinusoidal current waveform similar to the power grid. This paper presents a dynamic modeling study for a ZETA converter working in discontinuous conduction mode (DCM) applied to low power renewable energy sources using the generalized switch averaging technique. The modeling is performed considering only resistive loads. The whole system consists of a ZETA converter, using a sinusoidal pulse width modulation (PWM), associated with a full-bridge (FB) inverter, operating at low frequency, in order to synthesize a sinusoidal waveform at its output. Thus, the system works as a sinusoidal low power source. Initially it is presented a brief analysis of thesystem, as well as the characteristics that made possible the dynamic analysis in DCM. The generalized switch averaging technique is discussed, and also the small-signal analysis of the ZETA converter. In order to validate the current study experimental and simulation results are presented

[1]. Departamento de Estado dos EUA. "Soluyoes de Energia Limpa".eJoumal USA: Perspectivas Economicas. Vol 11. nO 2. 2006.
[2]. J. A. Pomilio. "Pre-reguladores de Fator de Potencia". Publicayao FEE 03 /95. 2007.
[3]. H. F. M. Lopez, C. Zollmann, R. C. Viero and F. S. dos Reis."Photovoltaic Panels Grid-Tied By a Zeta Converter". BrazilianPower Electronics Conference, pp. 1-6.2009.
[4]. A. Peres, D. C. Martins and I. Barbi. "ZETA Converter Applied in Power Factor Correction". IEEE Power Electronics Specialists Conf.,pp. 1152-1157. 1994.
[5]. H. F. M. Lopez, R. C. Viero, C. Zollmann, L. L. Reckzielgel, R. Tonkoski, F. S. dos Reis. Low Power Solar System Grid-Tied With MPPT Based on Temperature Compensation. The 9th Annual Electrical Power and Energy Conference - EPEC. 2009.