Hardness is one of the most important properties of engineering materials. It provides indication for material selection and also quality assurance tests for wear resistance. A Hardness Testing Machine was Designed, Fabricated and Tested. Four samples used for the machine evaluation were, mild steel, brass, Aluminum and copper. Standard Test procedure for Brinell Hardness Test was followed in testing for the fabricated Hardness Testing machine. Eight varying loads were applied at intervals of 30secs. The results recorded were represented graphically; results show that mild steel is the hardest of the samples followed by brass, Aluminum and copper in order of decreasing Hardness.
Keywords: - Hardness, Samples, Brinell Test, Machine
It was purposed to understand the dynamic response of beam which are subjected to moving point loads. The finite element method and numerical time integration method (Newmark method) are employed in the vibration analysis. The effect of the speed of the moving load on the dynamic magnification factor which is defined as the ratio of the maximum dynamic displacement at the corresponding node in the time history to the static displacement when the load is at the mid – point of the structure is investigated. The effect of the spring stiffness attached to the frame at the conjunction points of beam and columns are also evaluated. Computer codes written in Matlab are developed to calculate the dynamic responses. Dynamic responses of the engineering structures and critical load velocities can be found with high accuracy by using the finite element method
Keywords: - Beam, Finite Element methods, Numerical tine Integration method ,Dynamic magnification factors, Stiffnes, Shape Function. Critical load Velocity
A wireless sensor network is basically a collection of nodes that are organized into a cooperative network. Each node consists of processing capability that contain multiple types of memory and have a transceiver, a power source and accommodate various sensors. These sensor nodes can sense, measure and collect information from the environment and, based on some local decision process, they can transmit the sensed data to the user. In our work we have studied the various cluster formation algorithms. In this study clustering of the nodes are considered with the approach of reducing energy consumption of nodes and a protocol is presented. Due to network clustering there is scalability potential in such a network. According to frequent change of cluster head nodes load distribution is performed in the cluster and eventually increase the network lifetime.
Keywords: - BS, CH, Clustering, Node, WSNs
Tracking radar systems are used to measure the target's relative position in range, azimuth angle, elevation angle, and velocity. Then, by using and keeping track of these measured parameters the radar can predict their future values. This paper proposes the measure a single target angle using sequential lobing technique. The information is used, in conjunction with Doppler, to centre the antenna beam to follow the target and maintain maximum power on the target. This is achieved in an angle tracking loop which measures the angle between the antenna bore sight and the line of sight to the target and attempts to correct for any differences. Azimuth and elevation angles are determined by measuring the difference between echo signals from two different positions.
Keywords: - Target tracking radar, antenna, sequential lobing ,angle tracking, pencil beam Azimuth angle, elevation angle
[1] Merrill I. Skolnik, Introduction to Radar Systems, 3rd Edition, pp. 210-238, Mc Graw-Hill, New York, NY, 2001.
[2] David K. Barton, Radar System Analysis, pp.83-89, 327-331, Artech House, Dedham, MA, 1979.
[3] Warren L. Stutzman and Gary A. Thiele, Antenna Theory and Design, 2nd Edition, pp. 80 , 88-136, Wiley, Indianapolis, IN, 1998.
[4] David C. Jenn, "Tracking Arrays", Naval Postgraduate School, California, 2006.
[5] Bassem R. Mahafza CHAPMAN & HALL/CRC Radar Systems Analysis and Design Using MATL
Biometric voting has made the voting procedure simpler. It is a revolutionary method preferred to traditional EVM voting as it is risk defective. It is advantageous because it includes features such as voters can able to caste their votes globally, reduction of counting time , expenditure incurred on man power deployment and carrying of photo id cards for recognition. Stored finger prints are retained even in the event of complete power failure or battery drain. He/she grants permission to the voters to vote their selected candidates if the finger print are recognized. Each person can vote for one candidate only. Finally results are being displayed , when the polling officer enters the password.
Keywords: - Arduino microcontroller, ATmega328,FingerPrintmodule , Visual basics
This report introduces a novel low power logic family, called asynchronous fine grain power gated logic (AFPL).Each pipeline stage in the AFPL circuit is made up of efficient charge recovery logic (ECRL) gate, which carry out the logic part of the stage, and a handshake controller, which handles handshaking with the neighboring stages and provide power to ECRL gates.In the AFPL circuit, ECRL gates acquire power and become alive only when performing useful computations, and idle ECRL gates are not powered and thus have negligible power dissipation.The partial charge reuse (PCR) mechanism can be integrated in the AFPL circuit. With the PCR mechanism, part of the charge on the output nodes of an ECRL gate entering the discharge phase can be reused to charge the output nodes of another ECRL gate about to evaluate, reducing the energy dissipation required to complete the evaluation of an ECRL gate. Moreover, the AFPL-PCR adopts an enhanced C-element, called a Sutherland pull-up pull-down, in its handshake controllers such that an ECRL gate in the AFPL-PCR can enter the sleep mode early once its output has been obtained by the downstream pipeline stage.In order to assess the strength of the proposed AFPL, it is carried out in a Kogge-Stone Adder for performance comparison.
Index Terms: - Asynchronous circuit, Low power electronics, C-element, Power gating.
[1] M. Arsalan and M. Shams,"Asynchronous Adiabatic logic," in Proc.IEEE Int.Symp.Circuits Syst.May 2007,pp.3720-3723.
[2] Z. Chen, M. Johnson, L. Wei, and K. Roy, "Estimation of standby leakage power inCMOS circuits considering accurate modeling of transistor stacks," in Proc. Int. Symp. Low Power Electron. Design, 1998, pp. 239–244.
[3] K. Ishida, K. Kanda, A. Tamtrakarn, H. Kawaguchi, and T. Sakurai, "Managing subthreshold leakage in charge-based analog circuits with low-VTH transistors by analog T-switch (AT-switch) and super cut-off CMOS (SCCMOS)," IEEE J. Solid-State Circuits, vol. 41, no. 4, pp.859–867, Apr. 2006.
[4] H. Jeon, Y.-B. Kim, and M. Choi, "Standby leakage power reduction technique for nanoscale CMOS VLSI systems," IEEE Trans. Instr.Meas., vol. 59, no. 5, pp. 1127–1133, May 2010.
[5] T. Lin,K-S. Chong,B-H.Gwee, and J.S. Chang," Fine-grained power gating for leakage and short ciruit power reduction by using asynchronous logic," in Proc.IEEE Symp.Circuits Syst.,May 2009,pp.3162-3165.
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