During recent years, due to the technological advancements the increasing rate of mistake occurrence on semiconductors, timing error is currently receiving more attention. Because the latest semiconductor operates at a high frequency and with a low supply voltage, even little external disturbances can jeopardize the timing margin between successive clocks. Many strategies have been introduced to cope with a timing mistake. Existing approaches to alleviate a timing fault, on the other hand, are primarily focused on time-delaying mechanisms and overly complex operations, resulting in a timing problem on clock-based systems as well as hardware overhead. To address this, we offer a timing-error-tolerant technique that uses a simple mechanism to instantaneously fix a timing issue. The proposed technique can recover a timing error without losing time in a clock-based system by altering a clock in a flip-flop
Key Word: Pulsed Latch, Error Tolerant System, Transition Detector,Time Borrowing Circuit, Error Signal, Master Clock Generator.
[1]. M. Seok, G. Chen, S. Hanson, M. Wieckowski, D. Blaauw, and D. Sylvester, "CAS-FEST 2010: Mitigating variability in near-threshold computing," IEEE J. Emerg. Sel. Topics Circuits Syst., vol. 1, no. 1, pp. 42–49, Mar. 2011
[2]. S. Valadimas, A. Floros, Y. Tsiatouhas, A. Arapoyanni, and X. Kavousianos, "The time dilation technique for timing error tolerance," IEEE Trans. Comput., vol. 63, no. 5, pp. 1277–1286, May 2014.
[3]. M. R. Choudhury, V. Chandra, R. C. Aitken, and K. Mohanram, "Time-borrowing circuit designs and hardware prototyping for timing error resilience," IEEE Trans. Comput., vol. 63, no. 2, pp. 497–509, Feb. 2014.
[4]. S. Valadimas, Y. Tsiatouhas, and A. Arapoyanni, "Timing error tolerance in small core designs for SoC applications," IEEE Trans. Comput., vol. 65, no. 2, pp. 654–663, Feb. 2016
[5]. M . Seok, G. Chen, S. Hanson, M. Wieckowski, D. Blaauw, and D. Sylvester, "CAS-FEST 2010: Mitigating variability in near-threshold computing," IEEE J. Emerg. Sel. Topics Circuits Syst., vol. 1, no. 1, pp. 42–49, Mar. 2011.