Paper Type	::	Research Paper
Title	::	Automation of Maximum Load Control using 8051-Microcontroller
Country	::	India
Authors	::	Mr. B. T. Ramakrishna Rao ||, Anand Daga ||, K.V.V.Srinivasa Rao ||, M.NaveenKumar ||, B.Ajay Kumar.
Page No.	::	01-07
	::	10.9790/3021-04420107
	::	0.4/3021-04420107
		3021-0404-0207

It is from past few decades that the maximum demand for different types of consumers are being controlled manually in different forms, but in this project we would like to propose the control of maximum demand without involvement of human activity i.e., by using a controller. The controller used in this case can be of different types and can belong to any type of family. In this paper, we employ 8051 controller. The load demand at every instant is calculated and is compared with the permissible maximum load demand value, and when the instantaneous maximum demand value is inferior than the permissible limit then the operation is considered to be in equilibrium state, but when the value of instantaneous maximum demand crosses the limits of permissible maximum load demand then the controller comes into picture and controls(trips) the load by the phenomena of load shedding based on the priority set by the user.

[1] 'THE 8051 MICROCONTROLLER', Kenneth AYALA, Cengage Learning

[2] 'MICROPROCESSORS AND MICROCONTROLLERS', N.Senthil Kumar, M. Saravanam, S.Jevanatham, OXFORD University Press

[3] 'The 8051 Micro Controller and Embedded Systems', 3rd-edition Muhammad Ali Mazdi, Janice Gillispie Mazdi, Rolin D. McKinlay, Pearson Publications

[4] 'A Course in POWER SYSTEMS', J.B. Gupta, S.K.Kataria &Sons Publications.

[5] 'Modern Power System Analysis', D.P. Kothari, I J Nagarath, Tata McGraw-Hill Publications

Paper Type	::	Research Paper
Title	::	Jamming on X- Band Radar
Country	::	Sudan
Authors	::	Mahmoud Yahia Hussein ||, AbdelrasoulJabar Alzubaidi
Page No.	::	08-12
	::	10.9790/3021-04420812
	::	0.4/3021-04420812
		3021-0404-0212

Radar jamming is the intentional emission of radio frequency signals to interfere with the operation of a radar by saturating its receiver with noise or false information. In this paper jamming technique is used to jam x-band radar frequency. To accomplish this goal it's proposed to design circuit using Basic Stamp, ATmega16 Microcontroller, two X-Band motion detector modules, LCD and Digi's X-CTU software. In this design we considered one of x-band motion detector module as a radar and the second x-band motion detector as jammer circuit which uses Doppler frequency principle and generates 10.5 GHZ frequency.

 

Keywords: - Radar, Jamming, Basic stamp2, X-band motion detector, Antenna, Doppler

[1] Merrill I. Skolnik, "Introduction to Radar system", second ed. UnitedState, McGraw-Hill, lnc, 980. P: 7, 19, 23, 47-56,152,226,227,460.

[2] Richard A.Poisel, "Introduction to Communication electronic warfare system", Boston.London, Artech House, 2002, P: 189,449,509.
[3] Basic Stamp 2 microcontrollers comparisons. Retrieved April 28, 2012 from http://www.parallax.com/detail.asp?product_id=BS2-IC website of Parallax. Inc. developer and distributor of Basic Stamp 2 microcontroller .
[4] www.rambal.com/.../x-band.../32213-XBandMotionDetector-v1.0.pdf
[5] Mugu, "Electronic warfare and Radar systems Engineering Handbook", Washington D.C, April 1999, section 4-4.5, 4-7.5, 4-.1, 4-10.1.

Paper Type	::	Research Paper
Title	::	Rational Structural Designs for Highways in Different Climatic Zones in Sudan
Country	::	Sudan
Authors	::	Dr.Mohammed Mahmoud Shallal ||, Prof. Dr.Salih Elhadi Mohammed Ahmed
Page No.	::	13-26
	::	10.9790/3021-04421326
	::	0.4/3021-04421326
		3021-0404-0226

This paper represents a pavement design guide for highways in Sudan. It is intended to provide a simple and easily applied method for determining an appropriate pavement structure for the expected design criteria. In this paper, detailed subgrade study, socio-economic study and axle loading & traffic survey have been carried out. This is meant to provide reliable and first hand data. The main findings of this paper comprise: the Sudan subgrade soil study, the guides to choose the traffic growth rates, the trucks damage factors, the guides to arrive at the correct Equivalent Standard Axles in the design period Moreover, this paper produced a design catalogue that contain 308 pavement design section to be used in Sudan and anywhere in the globe as any other international pavement design catalogue.

 

Keywords: - subgrade soil, axle loads, equivalence factor, traffic growth rate, design period, pavement structural design)

[1]. T.F.FWA, 2006, The Handbook of Highway Engineering.
[2]. Asphalt Institute, 2008, Asphalt Pavements for Highways & Streets, Manual Series No.1 (MS-1), 9th edition, Lexington, KY, USA.
[3]. Asphalt Institute, 2005, User' Guide for Asphalt Pavement Design Software for Highways, Airports, Heavy Wheel Loads and other applications (SW-1).
[4]. Colm AO' Flaherty, 2002, (Highways, the Location, Design, Construction and Maintenance of Pavements), 4th edition.
[5]. American Association of State Highways and Transportation Officials (AASHTO), 2012, Standard Specifications for Transportation Materials and Methods of Sampling and Testing, USA.

Paper Type	::	Research Paper
Title	::	Use of Stylometry and Outlier Detection Algorithm in Online Writing Sample to Detect Outliers
Country	::	India
Authors	::	Sonia Sharma ||, Pushpendra Kumar Petrya
Page No.	::	27-30
	::	10.9790/3021-04422730
	::	0.4/3021-04422730
		3021-0404-0230

Outlier Detection, now a days, is one of the emerging technology used in data mining. The data objects which deviate from the other data objects in the data set are considered to be as outliers. Outliers are classified as global outliers, collective outliers and contextual outliers. Outlier detection contains a broad spectrum of techniques to detect outliers.[1] Here, we are going to propose an algorithm which detects outliers (unmatched sample) in online writing sample. The online writing sample is analysed firstly by using the well known concept "Stylometry‟. Stylometry is the study which helps to distinguish between the writing style of two persons. It is assumed that the writing style of two persons always differs and every person contains a feature in the sample which defines the uniqueness of the individual.[2] This model can be used in detecting plagiarism, e-mail verification and author identification. The idea behind this proposed model is to save the data from any criminal activities so that the correct author should be identified.

 

Keywords: - Feature Selection, Outlier detection, Stylometry, Threshold metrics, Unexpected parameter

[1] Jiwani Hen, Micheline Kamber, Jian Pei, "Data Mining Concepts and Techniques",Outlier Detection, pp No. 546-576
[2] Stylometry. (n.d.). Retrieved December 2013, from wikipedia: http://en.wikipedia.org/wiki/Stylometry
[3] Supervised Outlier Detection. (n.d.). Retrieved December 2013, from link.springer.com: http://link.springer.com/chapter/10.1007%2F978-1-4614-6396-2_6#page-1
[4] Ramyaa, He Congzhou, Rasheed Khaleed, "Using machine learning techniques for stylometry", Artificial intelligence Center, The university of Georgia, Athenes.
[5] Pavelec D, Oliviera L.S, Justino E, Neto F.D Nobre, Batista L.V, "Compression and Stylometry for Author identification", Curitiba, Brazil.

Paper Type	::	Research Paper
Title	::	Nano Level Associative Memories With Exploration Of Memristors
Country	::	India
Authors	::	Santosh Saraf ||, Dr. Arvind Bhavikatti
Page No.	::	31-33
	::	10.9790/3021-04423133
	::	0.4/3021-04423133
		3021-0404-0233

Associative Memories (AMs) are crucial units for brain-like brilliant computing with applications in unreal goal, speech identification, artificial intelligence, and robotics. Computation with such applications generally trusts on spatial and temporal connections in the input signal and has to be robust against noise and incomplete practices. The schematic approach for applying AMs is through Artificial Neural Networks (ANNs). Raising the density of ANN grounded on traditional circuit components sets a challenge since devices achieve their physical scalability limits. Moreover, stored information in AMs is insecure to destructive input signals. New nano-scale elements, like memristors, comprise one solution to the density issue. Memristors are non-linear time-dependent circuit elements with an inherently small form element. Still, new neuromorphic circuits generally apply memristors to substitute synapses in schematic ANN circuits. This sub-optimal use is mainly as there's no proved design methodology to effort the memristor's non-linear attributes in a broader means. Index terms : associative memories (AMs), artificial neural networks (ANNs) , memristors, neuromorphic circuit .

[1] A. Engelbrecht. Computational Intelligence, J. Wiley & Sons, New York, 2002
[2] A. Hodgkin and A. Huxley, A quantitative description of membrane current and its application to conduction and excitation in nerve, Bulletin of Mathematical Biology, 52:25–71, 1990. 10.1007/BF02459568
[3] A. Johannet, L. Personnaz, G. Dreyfus, J.-D. Gascuel, and M.Weinfeld. Specification and implementation of a digital Hopfield-type associative memory with on-chip training, Neural Networks, IEEE Transactions on, 3(4):529–539,1992
[4] A. Liefooghe, L. Jourdan, and E. G. Talbi, A Unified Model for Evolutionary Multiobjective Optimization and its Implementation in a General Purpose Software Framework: ParadisEO-MOEO. url: http://paradiseo.gforge.inria.fr/. Rapport de recherche RR-6906, INRIA, 2009
[5] B. Kosko. Bidirectional associative memories, Systems, Man and Cybernetics, IEEE Transactions on, 18(1):49–60, 1988.

Paper Type	::	Research Paper
Title	::	Challenges To Efficient And Effective Irrigation Water Management In Ghana – The Case Of Bontanga Irrigation Project
Country	::	Ghana
Authors	::	Clifford A. Braimah ||, Sampson Agodzo
Page No.	::	34-41
	::	10.9790/3021-04423441
	::	0.4/3021-04423441
		3021-0404-0241

Irrigation projects in Ghana have suffered from poor water management practices and this has been so because over the years irrigation system operation has been limited to construction of new projects and sometimes rehabilitation of existing ones. Post construction management of irrigation projects has not received the needed attention because adequate provisions in terms of manpower and resources are not made available to make that possible. There are always water flow measuring structures installed in irrigation projects but they are hardly used due to the sophisticated nature of measuring the flow of water using such structures. Water flow measuring devices installed on irrigation projects in Ghana are weirs and flumes. Calibrating such water flow devices will ensure the effective and efficient water management practices on those irrigation projects because the right quantities of water will be delivered to the fields from the water reservoirs. This research undertook a process of calibrating the two flumes on both the right bank and left bank canals of the Bontanga Irrigation Projects to ensure that the water levels in the canals can easily be converted into volumetric flow to allow for the water bailiffs to gauge the quantity of water being released into the canals. The relationship between the water level (h) in the canal and the discharge (Q) for the right bank flume was determined as Q = 4.425 h1.672 and that of the left bank canal was determined as Q = 4.066 h1.775. The research also measured the average runoff and sediment deposition into the Bontanga Irrigation reservoir. As a function of rainfall (P) the runoff (R) in the catchment was established as R = 0.16P and the annual sediment deposition around the right bank intake was 6.60cm whilst that around the left bank intake was 6.35cm. It is recommended that effective and efficient water management practices must be stepped up on the Bontanga Irrigation project if the country wants to derive the needed benefits from the project.

 

Keywords: - Bontanga Irrigation Project, Water management, calibration

[1] Agyingayure, V. (2001) Summary of pertinent data/information on Bontanga Irrigation Project. Project Report.

[2] Braimah, C. A. (2004) Water Balance Study of Bontanga Irrigation Reservoir and Some Environmental Issues. Kwame Nkrumah University of Science and Technology. (Unpublished MSc Thesis).

[3] Dinye, R. D. and Ayitio, J. (2013) Irrigated agricultural production and poverty reduction in Northen Ghana: A case study of the Tono Irrigation Scheme in the Kassena Nankana District. International Journal of Water Resources and Environmental Engineering Vol. 5(2), pp. 119-133.

[4] Environmental Protection Agency (EPA) (2003) National Management Measures to Control Nonpoint Pollution from Agriculture. Washington, USA.

[5] Faulkner, J. W. (2006) Water Use, Productivity, and Profitability of Small Scale Irrigation Schemes in Ghana's Upper East Region. Cornell University (Unpublished MSc Thesis)

Paper Type	::	Research Paper
Title	::	Double layer Lookup table technique implemented with (FPGA) for security
Country	::	Sudan
Authors	::	Zuhir Nemer Alaaraj ||, Abdelrasoul Jabar Alzubaidi
Page No.	::	50-53
	::	10.9790/3021-04425053
	::	0.4/3021-04425053
		3021-0404-0253

This work proposes a solution to improve the security of data through flexible bitstreem encryption, by using the two lookup table (LUT)s that is embedded in the FPGA.This technique concentrates on building high data security to make it difficult for an adversary to capture the real data.The syntheses proposed can be implemented in two steps: First step: programming the FPGA to create a two LUT by VHDL language each LUT has a predefined length and contents. Second step: applying security strategy. A high security and more reliability can be achieved by using this mechanism when applied on data communication and information transformed between networks.

 

Keywords: - LUT, FPGA.VHDL, embedded system, security.

[1] A. S. Daniel Ziener and T. J•urgen. Identifying FPGA IP-Cores based on lookup table content analysis. In Field Programmable Logic and Applications, August 2006. http://www12.informatik.uni-erlangen.de/publications/pub2006/zienerfpl06.pdf
[2] D. Agrawal, B. Archambeault, J. R. Rao, and P. Rohatgi.The EM side-channel(s).In Cryptographic Hardware and Embedded Systems Workshop, volume 2523 of LNCS, August 2002.http://www.springerlink.com/content/mvtxbq9qa287g7c6/\

Paper Type	::	Research Paper
Title	::	Chemical extraction controlled by (FPGA), programmed by (VHDL).
Country	::	Sudan
Authors	::	Zuhir Nemer Alaaraj ||, Abdelrasoul Jabar Alzubaidi
Page No.	::	54-57
	::	10.9790/3021-04425457
	::	0.4/3021-04425457
		3021-0404-0257

The field programmable gate array (FPGA) is an integrated circuit designed to be configured by the customer or designer after manufacturing—hence field programmable". The FPGA configuration is generally specified using a hardware description language (HDL), similar to that used for an application-specific integrated circuit (ASIC). FPGAs can be use to implement any logical function that an ASIC could perform. FPGAs contain programmable logic components called "logic blocks", and a hierarchy of reconfigurable interconnects that allow the blocks to be "wired together"—somewhat like many (changeable) logic gates that can be inter-wired in (many) different configurations, as shown in figure (1). Logic blocks can be configured to perform complex combinational functions, or merely simple logic gates like AND and XOR. In most FPGAs, the logic blocks also include memory elements, which may be simple flip-flops or more complete blocks of memory. There are numerous options for designers in selecting a hardware platform for custom electronics design, ranging from embedded processors, application specific integrated circuits (ASICs), programmable microprocessor, FPGAs to programmable logic devices (PLDs). The decision to choose a specific technology such as an FPGA should depend primarily on the design requirements. Therefore, if the hardware requirements require a higher level of performance, say up several 100 MHz operation, then an FPGA offers a suitable level of performance. [4] To define the behavior of the FPGA is performed by programming it by a very high speed integrated circuit hardware description language (VHDL). [1]

[1] Volnei A. Pedroni, Circuit Design with VHDL, MIT press, Massachusts, 2004.
[2] Peng Zhang, Industrial Control Tecnology,William Andrew, N. Y., 2008.
[3] ISE Simulator (ISim), UG682 (v1.0), 2009.
[4] www.fpga4fun.com.